Xathrya Sabertooth |
Posted: 19 Apr 2014 01:49 AM PDT This is basic code for VHDL. In this article, we use GHDL (http://ghdl.free.fr), as DHL simulator which run on Windows 8.1 platform. Objective
CodeWe will create an empty entity, named “hello_world”. We then create an architecture based on that entity. entity hello_world is -- test bench (top level like "main") end entity hello_world; library STD; library IEEE; use IEEE.std_logic_1164.all; -- basic logic types use STD.textio.all; -- basic I/O architecture test of hello_world is signal counter : integer := 1; begin m_print : process is -- a process is parallel variable m_line : line; -- type 'line' comes from textio begin write(m_line, string'("Xath say: Hello World")); -- formatting writeline(output, m_line); -- write to "output" write(m_line, string'(" counter = ")); write(m_line, counter); writeline(output, m_line); wait; end process m_print; end architecture test; To simulate the code in GHDL, you should use following steps: First, we have to analyze the file. In this step, ghdl will creates or update a .cf file which describe the library. ghdl -a hello_world.vhdl Second, we run the code. ghdl -r hello_world ResultWhy it Works |
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